CuVoodoo STM32F1 firmware template
uart_soft.c
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1 /* This program is free software: you can redistribute it and/or modify
2  * it under the terms of the GNU General Public License as published by
3  * the Free Software Foundation, either version 3 of the License, or
4  * (at your option) any later version.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program. If not, see <http://www.gnu.org/licenses/>.
13  *
14  */
22 /* standard libraries */
23 #include <stdint.h> // standard integer types
24 #include <stdlib.h> // general utilities
25 
26 /* STM32 (including CM3) libraries */
27 #include <libopencm3/stm32/rcc.h> // real-time control clock library
28 #include <libopencm3/stm32/gpio.h> // general purpose input output library
29 #include <libopencm3/stm32/timer.h> // timer library
30 #include <libopencm3/cm3/nvic.h> // interrupt handler
31 #include <libopencm3/stm32/exti.h> // external interrupt defines
32 #include <libopencmsis/core_cm3.h> // Cortex M3 utilities
33 
34 #include "uart_soft.h" // software UART library API
35 #include "global.h" // common methods
36 
42 #define UART_SOFT_RX_PORT0 B
43 #define UART_SOFT_RX_PIN0 9
44 //#define UART_SOFT_RX_PORT1 A
45 //#define UART_SOFT_RX_PIN1 0
46 //#define UART_SOFT_RX_PORT2 A
47 //#define UART_SOFT_RX_PIN2 0
48 //#define UART_SOFT_RX_PORT3 A
49 //#define UART_SOFT_RX_PIN3 0
50 #define UART_SOFT_TX_PORT0 B
51 #define UART_SOFT_TX_PIN0 8
52 //#define UART_SOFT_TX_PORT1 A
53 //#define UART_SOFT_TX_PIN1 0
54 //#define UART_SOFT_TX_PORT2 A
55 //#define UART_SOFT_TX_PIN2 0
56 //#define UART_SOFT_TX_PORT3 A
57 //#define UART_SOFT_TX_PIN3 0
61 #define UART_SOFT_BUFFER 128
62 
64  uint32_t port;
65  uint16_t pin;
66  uint32_t rcc;
67  uint32_t exti;
68  uint32_t irq;
69  uint32_t baudrate;
70  volatile uint16_t state;
71  volatile uint8_t bit;
72  volatile uint8_t byte;
73  volatile uint8_t buffer[UART_SOFT_BUFFER];
74  volatile uint8_t buffer_i;
75  volatile uint8_t buffer_used;
76  volatile bool lock;
77  volatile uint8_t buffer_byte;
78  volatile bool buffer_byte_used;
80 };
83  uint32_t port;
84  uint16_t pin;
85  uint32_t rcc;
86  uint32_t baudrate;
87  volatile uint8_t bit;
88  volatile uint8_t byte;
89  volatile uint8_t buffer[UART_SOFT_BUFFER];
90  volatile uint8_t buffer_i;
91  volatile uint8_t buffer_used;
92  volatile bool transmit;
93 };
94 
95 static struct soft_uart_rx_state* uart_soft_rx_states[4] = {NULL};
96 static struct soft_uart_tx_state* uart_soft_tx_states[4] = {NULL};
98 volatile bool uart_soft_received[4] = {false, false, false, false};
99 
103 #if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN0))
104  #define UART_SOFT_RX_TIMER 3
105 #endif
106 #if (defined(UART_SOFT_TX_PORT0) && defined(UART_SOFT_TX_PIN0)) || (defined(UART_SOFT_TX_PORT1) && defined(UART_SOFT_TX_PIN1)) || (defined(UART_SOFT_TX_PORT2) && defined(UART_SOFT_TX_PIN2)) || (defined(UART_SOFT_TX_PORT3) && defined(UART_SOFT_TX_PIN0))
107  #define UART_SOFT_TX_TIMER 4
108 #endif
109 
111 static const uint32_t timer_flags[4] = {TIM_SR_CC1IF,TIM_SR_CC2IF,TIM_SR_CC3IF,TIM_SR_CC4IF};
112 static const uint32_t timer_interrupt[4] = {TIM_DIER_CC1IE,TIM_DIER_CC2IE,TIM_DIER_CC3IE,TIM_DIER_CC4IE};
113 static const enum tim_oc_id timer_oc[4] = {TIM_OC1,TIM_OC2,TIM_OC3,TIM_OC4};
115 bool uart_soft_setup(uint32_t *rx_baudrates, uint32_t *tx_baudrates)
116 {
117  (void)rx_baudrates; // ensure compile does no complain even if no receive port is used
118  (void)tx_baudrates; // ensure compile does no complain even if no transmit port is used
119 
120  // save UART receive definition
121 #if defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0)
122  uart_soft_rx_states[0] = calloc(1,sizeof(struct soft_uart_rx_state)); // create state definition
123  uart_soft_rx_states[0]->port = GPIO(UART_SOFT_RX_PORT0); // save receive port
124  uart_soft_rx_states[0]->pin = GPIO(UART_SOFT_RX_PIN0); // save receive pin
125  uart_soft_rx_states[0]->rcc = RCC_GPIO(UART_SOFT_RX_PORT0); // save receive port peripheral clock
126  uart_soft_rx_states[0]->exti = EXTI(UART_SOFT_RX_PIN0); // save receive external interrupt
127  uart_soft_rx_states[0]->irq = NVIC_EXTI_IRQ(UART_SOFT_RX_PIN0); // save receive interrupt request
128 #endif
129 
130  // setup UART receive GPIO
131  for (uint8_t rx=0; rx<4; rx++) {
132  if (!uart_soft_rx_states[rx]) { // verify is receive UART is defined
133  continue; // skip configuration if not defined
134  }
135  if (!rx_baudrates || rx_baudrates[rx]==0) { // verify if receive baud rate has been defined
136  return false;
137  }
138  uart_soft_rx_states[rx]->baudrate = rx_baudrates[rx]; // save baud rate
139  rcc_periph_clock_enable(uart_soft_rx_states[rx]->rcc); // enable clock for GPIO peripheral
140  gpio_set_mode(uart_soft_rx_states[rx]->port, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, uart_soft_rx_states[rx]->pin); // setup GPIO pin UART receive
141  gpio_set(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // pull up to avoid noise when not connected
142  rcc_periph_clock_enable(RCC_AFIO); // enable alternate function clock for external interrupt
143  exti_select_source(uart_soft_rx_states[rx]->exti, uart_soft_rx_states[rx]->port); // mask external interrupt of this pin only for this port
144  exti_enable_request(uart_soft_rx_states[rx]->exti); // enable external interrupt
145  exti_set_trigger(uart_soft_rx_states[rx]->exti, EXTI_TRIGGER_BOTH); // trigger when button is pressed
146  nvic_enable_irq(uart_soft_rx_states[rx]->irq); // enable interrupt
147  uart_soft_rx_states[rx]->state = gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // save state of GPIO
148  uart_soft_rx_states[rx]->bit = 0; // reset bits received
149  }
150 
151  // save UART transmit definition
152 #if defined(UART_SOFT_TX_PORT0) && defined(UART_SOFT_TX_PIN0)
153  uart_soft_tx_states[0] = calloc(1,sizeof(struct soft_uart_tx_state)); // create state definition
154  uart_soft_tx_states[0]->port = GPIO(UART_SOFT_TX_PORT0); // save receive port
155  uart_soft_tx_states[0]->pin = GPIO(UART_SOFT_TX_PIN0); // save receive pin
156  uart_soft_tx_states[0]->rcc = RCC_GPIO(UART_SOFT_TX_PORT0); // save receive port peripheral clock
157 #endif
158 
159  // setup UART transmit GPIO
160  for (uint8_t tx=0; tx<4; tx++) {
161  if (!uart_soft_tx_states[tx]) { // verify is transmit UART is defined
162  continue; // skip configuration if not defined
163  }
164  if (!tx_baudrates || tx_baudrates[tx]==0) { // verify if transmit baud rate has been defined
165  return false;
166  }
167  uart_soft_tx_states[tx]->baudrate = tx_baudrates[tx]; // save baud rate
168  rcc_periph_clock_enable(uart_soft_tx_states[tx]->rcc); // enable clock for GPIO peripheral
169  gpio_set_mode(uart_soft_tx_states[tx]->port, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, uart_soft_tx_states[tx]->pin); // setup GPIO UART transmit pin
170  gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // idle high
171  }
172 
173  // setup timer
174 #if defined(UART_SOFT_RX_TIMER)
175  rcc_periph_clock_enable(RCC_TIM(UART_SOFT_RX_TIMER)); // enable clock for timer peripheral
176  timer_reset(TIM(UART_SOFT_RX_TIMER)); // reset timer state
177  timer_set_mode(TIM(UART_SOFT_RX_TIMER), TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock, edge alignment (simple count), and count up
178  timer_set_prescaler(TIM(UART_SOFT_RX_TIMER), 0); // prescaler to be able to sample 2400-115200 bps (72MHz/2^16=1099<2400bps)
179  nvic_enable_irq(NVIC_TIM_IRQ(UART_SOFT_RX_TIMER)); // allow interrupt for timer
180  timer_enable_counter(TIM(UART_SOFT_RX_TIMER)); // start timer to generate interrupts for the receive pins
181 #endif
182 #if defined(UART_SOFT_TX_TIMER)
183  rcc_periph_clock_enable(RCC_TIM(UART_SOFT_TX_TIMER)); // enable clock for timer peripheral
184  timer_reset(TIM(UART_SOFT_TX_TIMER)); // reset timer state
185  timer_set_mode(TIM(UART_SOFT_TX_TIMER), TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock, edge alignment (simple count), and count up
186  timer_set_prescaler(TIM(UART_SOFT_TX_TIMER), 0); // prescaler to be able to output 2400-115200 bps (72MHz/2^16=1099<2400bps)
187  nvic_enable_irq(NVIC_TIM_IRQ(UART_SOFT_TX_TIMER)); // allow interrupt for timer
188  timer_enable_counter(TIM(UART_SOFT_TX_TIMER)); // start timer to generate interrupts for the transmit pins
189 #endif
190 
191  return true; // setup completed
192 }
193 
194 #if defined(UART_SOFT_RX_TIMER)
195 uint8_t uart_soft_getbyte(uint8_t uart)
196 {
197  if (uart>=4 || !uart_soft_rx_states[uart]) { // ensure receive UART port is defined
198  return 0; // return
199  }
200  while (!uart_soft_rx_states[uart]->buffer_used) { // idle until data is available
201  __WFI(); // sleep until interrupt
202  }
203  uart_soft_rx_states[uart]->lock = true; // set lock
204  uint8_t to_return = uart_soft_rx_states[uart]->buffer[uart_soft_rx_states[uart]->buffer_i]; // get the next available character
205  uart_soft_rx_states[uart]->buffer_i = (uart_soft_rx_states[uart]->buffer_i+1)%LENGTH(uart_soft_rx_states[uart]->buffer); // update used buffer
206  uart_soft_rx_states[uart]->buffer_used--; // update used buffer
207  uart_soft_rx_states[uart]->lock = false; // free lock
208  if (uart_soft_rx_states[uart]->buffer_byte_used) { // temporary byte has been stored
210  uart_soft_rx_states[uart]->buffer_used++; // update used buffer
211  uart_soft_rx_states[uart]->buffer_byte_used = false; // buffer byte is now in buffer
212  }
213  uart_soft_received[uart] = (uart_soft_rx_states[uart]->buffer_used!=0); // notify user if data is available
214  uart_soft_rx_states[uart]->lock = false; // free lock
215  return to_return;
216 }
217 
220 {
221  for (uint8_t rx=0; rx<4; rx++) {
222  if (timer_interrupt_source(TIM(UART_SOFT_RX_TIMER),timer_flags[rx])) { // got a match on compare for receive pin
223  timer_clear_flag(TIM(UART_SOFT_RX_TIMER),timer_flags[rx]); // clear flag
224  if (!uart_soft_rx_states[rx]) { // verify if RX exists
225  continue; // skip if receive port is not defined it
226  }
227  uart_soft_rx_states[rx]->byte += ((gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin)==0 ? 0 : 1)<<(uart_soft_rx_states[rx]->bit-1)); // save bit value
228  if (uart_soft_rx_states[rx]->bit<8) { // not the last bit received
229  timer_set_oc_value(TIM(UART_SOFT_RX_TIMER),timer_oc[rx],timer_get_counter(TIM(UART_SOFT_RX_TIMER))+rcc_ahb_frequency/uart_soft_rx_states[rx]->baudrate); // set timer to next bit
230  uart_soft_rx_states[rx]->bit++; // wait for next bit
231  } else { // last bit received
232  if (uart_soft_rx_states[rx]->lock) { // someone is already reading data
233  uart_soft_rx_states[rx]->buffer_byte = uart_soft_rx_states[rx]->byte; // save byte
234  uart_soft_rx_states[rx]->buffer_byte_used = true; // notify reader there is a temporary byte
235  } else { // buffer can be updated
236  if (uart_soft_rx_states[rx]->buffer_used>=LENGTH(uart_soft_rx_states[rx]->buffer)) { // buffer is full
238  uart_soft_rx_states[rx]->buffer_used--; // update buffer usage
239  }
241  uart_soft_rx_states[rx]->buffer_used++; // update used buffer
242  uart_soft_received[rx] = true; // notify user data is available
243  }
244  timer_disable_irq(TIM(UART_SOFT_RX_TIMER),timer_interrupt[rx]); // stop_interrupting
245  uart_soft_rx_states[rx]->bit = 0; // next bit should be first bit of next byte
246  }
247  }
248  }
249 }
250 #endif
251 
252 #if defined(UART_SOFT_TX_TIMER)
253 void uart_soft_flush(uint8_t uart)
254 {
255  if (uart>=4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
256  return; // return
257  }
258  while (uart_soft_tx_states[uart]->buffer_used) { // idle until buffer is empty
259  __WFI(); // sleep until interrupt
260  }
261  while (uart_soft_tx_states[uart]->transmit) { // idle until transmission is complete
262  __WFI(); // sleep until interrupt
263  }
264 }
265 
269 static void uart_soft_transmit(uint8_t uart) {
270  if (uart>=4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
271  return; // UART transmit port not defined
272  }
273  if (uart_soft_tx_states[uart]->transmit) { // already transmitting
274  return; // transmission is already ongoing
275  }
276  if (!uart_soft_tx_states[uart]->buffer_used) { // no buffered data to transmit
277  return; // nothing to transmit
278  }
280  uart_soft_tx_states[uart]->buffer_i = (uart_soft_tx_states[uart]->buffer_i+1)%LENGTH(uart_soft_tx_states[uart]->buffer); // update index
281  uart_soft_tx_states[uart]->buffer_used--; // update used buffer
282  uart_soft_tx_states[uart]->bit = 0; // LSb is transmitted first
283  uart_soft_tx_states[uart]->transmit = true; // start transmission
284  gpio_clear(uart_soft_tx_states[uart]->port, uart_soft_tx_states[uart]->pin); // output start bit
285  timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[uart], timer_get_counter(TIM(UART_SOFT_TX_TIMER))+(rcc_ahb_frequency/uart_soft_tx_states[uart]->baudrate)); // set timer to output UART frame 1 (data bit 0) in 1 bit
286  timer_clear_flag(TIM(UART_SOFT_TX_TIMER), timer_flags[uart]); // clear flag before enabling interrupt
287  timer_enable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[uart]);// enable timer IRQ for TX for this UART
288 }
289 
290 void uart_soft_putbyte_nonblocking(uint8_t uart, uint8_t byte)
291 {
292  if (uart>=4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
293  return; // return
294  }
295  while (uart_soft_tx_states[uart]->buffer_used>=LENGTH(uart_soft_tx_states[uart]->buffer)) { // idle until there is place in the buffer
296  __WFI(); // sleep until something happened
297  }
298  uart_soft_tx_states[uart]->buffer[(uart_soft_tx_states[uart]->buffer_i+uart_soft_tx_states[uart]->buffer_used)%LENGTH(uart_soft_tx_states[uart]->buffer)] = byte; // save byte to be transmitted
299  uart_soft_tx_states[uart]->buffer_used++; // update used buffer
300  uart_soft_transmit(uart); // start transmission
301 }
302 
303 void uart_soft_putbyte_blocking(uint8_t uart, uint8_t byte)
304 {
305  uart_soft_putbyte_nonblocking(uart, byte); // put byte in queue
306  uart_soft_flush(uart); // wait for all byte to be transmitted
307 }
308 
311 {
312  for (uint8_t tx=0; tx<4; tx++) {
313  if (timer_interrupt_source(TIM(UART_SOFT_TX_TIMER),timer_flags[tx])) { // got a match on compare for transmit pin
314  timer_clear_flag(TIM(UART_SOFT_TX_TIMER),timer_flags[tx]); // clear flag
315  if (!uart_soft_tx_states[tx]) { // verify if transmit is defined
316  continue; // skip if transmit port is not defined it
317  }
318  if (uart_soft_tx_states[tx]->bit<8) { // there is a data bit to transmit
319  if ((uart_soft_tx_states[tx]->byte>>uart_soft_tx_states[tx]->bit)&0x01) { // bit to transmit is a 1
320  gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // set output to high
321  } else { // bit to transmit is a 0
322  gpio_clear(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // set output to low
323  }
324  timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[tx], timer_get_counter(TIM(UART_SOFT_TX_TIMER))+(rcc_ahb_frequency/uart_soft_tx_states[tx]->baudrate)); // wait for the next frame bit
325  uart_soft_tx_states[tx]->bit++; // go to next bit
326  } else if (uart_soft_tx_states[tx]->bit==8) { // transmit stop bit
327  gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // go idle high
328  timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[tx], timer_get_counter(TIM(UART_SOFT_TX_TIMER))+(rcc_ahb_frequency/uart_soft_tx_states[tx]->baudrate)); // wait for 1 stop bit
329  uart_soft_tx_states[tx]->bit++; // go to next bit
330  } else { // UART frame is complete
331  timer_disable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[tx]);// enable timer IRQ for TX for this UART
332  uart_soft_tx_states[tx]->transmit = false; // transmission finished
333  uart_soft_transmit(tx); // start next transmission (if there is)
334  }
335  } // compare match
336  } // go through UARTs
337 }
338 #endif
339 
341 static void uart_soft_receive_activity(void)
342 {
343  for (uint8_t rx=0; rx<4; rx++) {
344  if (!uart_soft_rx_states[rx]) { // verify if receive port is not configured
345  continue; // skip if receive port is not defined it
346  }
347  if (uart_soft_rx_states[rx]->state!=gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin)) { // only do something if state changed
348  uart_soft_rx_states[rx]->state = gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // save new state
349  if (uart_soft_rx_states[rx]->bit==0) { // start bit edge detected
350  if (uart_soft_rx_states[rx]->state==0) { // start bit has to be low
351  timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER))+(rcc_ahb_frequency/uart_soft_rx_states[rx]->baudrate)*1.5); // set timer to sample data bit 0 in 1.5 bits
352  timer_clear_flag(TIM(UART_SOFT_RX_TIMER), timer_flags[rx]); // clear flag before enabling interrupt
353  timer_enable_irq(TIM(UART_SOFT_RX_TIMER), timer_interrupt[rx]);// enable timer IRQ for RX for this UART
354  uart_soft_rx_states[rx]->byte = 0; // reset byte value
355  uart_soft_rx_states[rx]->bit++; // wait for first bit
356  }
357  } else { // data bit detected
358  timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER))+(rcc_ahb_frequency/uart_soft_rx_states[rx]->baudrate)/2); // resync timer to half a bit (good for drifting transmission, bad if the line is noisy)
359  }
360  }
361  }
362 }
363 
365 #if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==0) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==0) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==0) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==0)
366 void exti0_isr(void)
367 {
368  exti_reset_request(EXTI0); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
369  uart_soft_receive_activity(); // check which GPIO changed
370 }
371 #endif
372 #if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==1) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==1) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==1) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==1)
373 void exti1_isr(void)
374 {
375  exti_reset_request(EXTI1); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
376  uart_soft_receive_activity(); // check which GPIO changed
377 }
378 #endif
379 #if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==2) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==2) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==2) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==2)
380 void exti2_isr(void)
381 {
382  exti_reset_request(EXTI2); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
383  uart_soft_receive_activity(); // check which GPIO changed
384 }
385 #endif
386 #if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==3) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==3) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==3) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==3)
387 void exti3_isr(void)
388 {
389  exti_reset_request(EXTI3); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
390  uart_soft_receive_activity(); // check which GPIO changed
391 }
392 #endif
393 #if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==4) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==4) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==4) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==4)
394 void exti4_isr(void)
395 {
396  exti_reset_request(EXTI4); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
397  uart_soft_receive_activity(); // check which GPIO changed
398 }
399 #endif
400 #if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && (UART_SOFT_RX_PIN0==5 || UART_SOFT_RX_PIN0==6 || UART_SOFT_RX_PIN0==7 || UART_SOFT_RX_PIN0==8 || UART_SOFT_RX_PIN0==9)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && (UART_SOFT_RX_PIN1==5 || UART_SOFT_RX_PIN1==6 || UART_SOFT_RX_PIN1==7 || UART_SOFT_RX_PIN1==8 || UART_SOFT_RX_PIN1==9)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && (UART_SOFT_RX_PIN2==5 || UART_SOFT_RX_PIN2==6 || UART_SOFT_RX_PIN2==7 || UART_SOFT_RX_PIN2==8 || UART_SOFT_RX_PIN2==9)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && (UART_SOFT_RX_PIN3==5 || UART_SOFT_RX_PIN3==6 || UART_SOFT_RX_PIN3==7 || UART_SOFT_RX_PIN3==8 || UART_SOFT_RX_PIN3==9))
401 void exti9_5_isr(void)
402 {
403  exti_reset_request(EXTI5|EXTI6|EXTI7|EXTI8|EXTI9); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
404  uart_soft_receive_activity(); // check which GPIO changed
405 }
406 #endif
407 #if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && (UART_SOFT_RX_PIN0==10 || UART_SOFT_RX_PIN0==11 || UART_SOFT_RX_PIN0==12 || UART_SOFT_RX_PIN0==13 || UART_SOFT_RX_PIN0==14 || UART_SOFT_RX_PIN0==15)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && (UART_SOFT_RX_PIN1==10 || UART_SOFT_RX_PIN1==11 || UART_SOFT_RX_PIN1==12 || UART_SOFT_RX_PIN1==13 || UART_SOFT_RX_PIN1==14 || UART_SOFT_RX_PIN1==15)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && (UART_SOFT_RX_PIN2==10 || UART_SOFT_RX_PIN2==11 || UART_SOFT_RX_PIN2==12 || UART_SOFT_RX_PIN2==13 || UART_SOFT_RX_PIN2==14 || UART_SOFT_RX_PIN2==15)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && (UART_SOFT_RX_PIN3==10 || UART_SOFT_RX_PIN3==11 || UART_SOFT_RX_PIN3==12 || UART_SOFT_RX_PIN3==13 || UART_SOFT_RX_PIN3==14 || UART_SOFT_RX_PIN3==15))
408 void exti15_10_isr(void)
409 {
410  exti_reset_request(EXTI10|EXTI11|EXTI12|EXTI13|EXTI14|EXTI15); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
411  uart_soft_receive_activity(); // check which GPIO changed
412 }
413 #endif
414 
void uart_soft_putbyte_nonblocking(uint8_t uart, uint8_t byte)
put byte in buffer to be transmitted on UART port
Definition: uart_soft.c:290
#define TIM_ISR(x)
get interrupt service routine for timer base on TIM identifier
Definition: global.h:113
uint32_t exti
UART receive external interrupt.
Definition: uart_soft.c:67
#define RCC_GPIO(x)
get RCC for GPIO based on GPIO identifier
Definition: global.h:105
volatile bool buffer_byte_used
signal a byte has been stored in temporary buffer
Definition: uart_soft.c:78
#define UART_SOFT_RX_PORT0
port for receive signal for UART port 0
Definition: uart_soft.c:42
uint32_t baudrate
UART receive baud rate.
Definition: uart_soft.c:86
uint32_t rcc
UART receive port peripheral clock.
Definition: uart_soft.c:85
#define NVIC_TIM_IRQ(x)
get NVIC IRQ for timer base on TIM identifier
Definition: global.h:111
void uart_soft_flush(uint8_t uart)
ensure all bytes are transmitted for the UART
Definition: uart_soft.c:253
volatile bool transmit
flag to know it transmission is ongoing
Definition: uart_soft.c:92
#define UART_SOFT_TX_PIN0
pin for transmit signal for UART port 0
Definition: uart_soft.c:51
#define NVIC_EXTI_IRQ(x)
get NVIC IRQ for external interrupt base on external interrupt/pin
Definition: global.h:156
volatile uint8_t buffer_used
how much data is available
Definition: uart_soft.c:91
#define UART_SOFT_RX_PIN0
pin for receive signal for UART port 0
Definition: uart_soft.c:43
static void uart_soft_transmit(uint8_t uart)
start transmitting a byte from the buffer
Definition: uart_soft.c:269
library to control up to 4 independent receive and transmit software UART ports (API) ...
volatile uint8_t buffer_i
index of current data to be read out
Definition: uart_soft.c:74
global definitions and methods (API)
#define GPIO(x)
get GPIO based on GPIO identifier
Definition: global.h:103
volatile uint8_t bit
next UART frame bit to receive
Definition: uart_soft.c:71
uint32_t baudrate
UART receive baud rate.
Definition: uart_soft.c:69
void uart_soft_putbyte_blocking(uint8_t uart, uint8_t byte)
transmit byte on UART port
Definition: uart_soft.c:303
#define RCC_TIM(x)
get RCC for timer based on TIM identifier
Definition: global.h:109
#define UART_SOFT_TX_PORT0
port for transmit signal for UART port 0
Definition: uart_soft.c:50
uint32_t port
UART receive port.
Definition: uart_soft.c:83
uint8_t uart_soft_getbyte(uint8_t uart)
get received byte from UART port
Definition: uart_soft.c:195
volatile bool lock
put lock when changing buffer_i or buffer_used
Definition: uart_soft.c:76
volatile uint8_t bit
next UART frame bit to transmit
Definition: uart_soft.c:87
volatile uint8_t buffer_used
how much data is available
Definition: uart_soft.c:75
uint16_t pin
UART receive pin.
Definition: uart_soft.c:84
UART receive state definition.
Definition: uart_soft.c:63
UART transmit state definition.
Definition: uart_soft.c:82
volatile uint8_t byte
byte being transmitted
Definition: uart_soft.c:88
#define EXTI(x)
get external interrupt based on pin identifier
Definition: global.h:154
#define UART_SOFT_TX_TIMER
timer peripheral for transmit signals
Definition: uart_soft.c:107
volatile uint8_t byte
byte being received
Definition: uart_soft.c:72
volatile uint8_t buffer_i
index of current data to be read out
Definition: uart_soft.c:90
void exti9_5_isr(void)
GPIO interrupt service routine to detect UART receive activity.
Definition: uart_soft.c:401
static uint8_t * buffer
input/output buffer for read/write commands/functions
uint32_t port
UART receive port.
Definition: uart_soft.c:64
static const uint32_t timer_interrupt[4]
the interrupt enable for the compare units
Definition: uart_soft.c:112
static enum tim_oc_id timer_oc[4]
the output compares for the compare units
Definition: uart_soft.c:113
volatile uint16_t state
GPIO state for receive pin.
Definition: uart_soft.c:70
uint32_t irq
UART receive interrupt request.
Definition: uart_soft.c:68
volatile uint8_t buffer_byte
to temporary store byte while locked
Definition: uart_soft.c:77
#define LENGTH(x)
get the length of an array
Definition: global.h:26
#define UART_SOFT_RX_TIMER
timer peripheral for receive signals
Definition: uart_soft.c:104
volatile uint8_t buffer[UART_SOFT_BUFFER]
receive buffer
Definition: uart_soft.c:89
bool uart_soft_setup(uint32_t *rx_baudrates, uint32_t *tx_baudrates)
setup software UART ports
Definition: uart_soft.c:115
volatile uint8_t buffer[UART_SOFT_BUFFER]
receive buffer
Definition: uart_soft.c:73
#define TIM(x)
get TIM based on TIM identifier
Definition: global.h:107
uint32_t rcc
UART receive port peripheral clock.
Definition: uart_soft.c:66
static struct soft_uart_tx_state * uart_soft_tx_states[4]
states of UART transmit ports (up to 4)
Definition: uart_soft.c:96
#define UART_SOFT_BUFFER
buffer size for receive and transmit buffers
Definition: uart_soft.c:61
static struct soft_uart_rx_state * uart_soft_rx_states[4]
states of UART receive ports (up to 4)
Definition: uart_soft.c:95
static const uint32_t timer_flags[4]
the interrupt flags for the compare units
Definition: uart_soft.c:111
uint16_t pin
UART receive pin.
Definition: uart_soft.c:65
static void uart_soft_receive_activity(void)
central function handling receive signal activity
Definition: uart_soft.c:341
volatile bool uart_soft_received[4]
if data has been received from UART port and is available to be read
Definition: uart_soft.c:98