30 #include <libopencmsis/core_cm3.h> 31 #include <libopencm3/cm3/nvic.h> 32 #include <libopencm3/stm32/rcc.h> 33 #include <libopencm3/stm32/gpio.h> 34 #include <libopencm3/stm32/timer.h> 44 #define ONEWIRE_MASTER_TIMER 5 50 #define ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE false 68 #if defined(ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE) && ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE 69 static void (*isr_backup)(void) = NULL;
70 static bool irq_backup =
false;
74 #if defined(ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE) && ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE 75 static void onewire_master_timer_isr(
void)
195 #if defined(ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE) && ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE 217 #if defined(ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE) && ONEWIRE_MASTER_TIMER_USE_INTERRUPT_TABLE 320 if (NULL==data || 0==length) {
325 for (uint8_t i=0; i<length; i++) {
327 for (uint8_t b=0; b<8; b++) {
371 if (NULL==data || 0==bits) {
392 if (NULL==data || 0==bits) {
409 uint8_t rom_code[8] = {0};
419 for (uint32_t i=0; i<8; i++) {
420 code += (uint64_t)rom_code[i]<<(8*i);
428 static uint8_t conflict_last = 64;
429 uint8_t conflict_current = 64;
430 uint8_t bits[1] = {0};
433 uint8_t command = 0xf0;
441 if (conflict_last>=64) {
446 for (uint8_t bit=0; bit<64; bit++) {
453 if (bit==conflict_last) {
454 *code |= (((uint64_t)1)<<bit);
456 conflict_current = bit;
457 *code &= ~(((uint64_t)1)<<bit);
461 *code |= (((uint64_t)1)<<bit);
464 *code &= ~(((uint64_t)1)<<bit);
467 conflict_current = 64;
471 buffer[0] = ((*code)>>bit);
477 uint8_t rom_code[8] = {0};
478 for (uint8_t i=0; i<
LENGTH(rom_code); i++) {
479 rom_code[i] = (*code)>>(8*i);
486 conflict_last = conflict_current;
487 if (conflict_current<64) {
504 uint8_t rom_code[8] = {0};
505 for (uint8_t i=0; i<
LENGTH(rom_code); i++) {
506 rom_code[i] = code>>(8*i);
static volatile uint32_t buffer_bit
number of bits read/written
#define ONEWIRE_MASTER_PORT
GPIO port.
#define RCC_GPIO(x)
get RCC for GPIO based on GPIO identifier
uint64_t onewire_master_rom_read(void)
send READ ROM command and read ROM code response
bool onewire_master_rom_search(uint64_t *code, bool alarm)
send SEARCH ROM command
#define NVIC_TIM_IRQ(x)
get NVIC IRQ for timer base on TIM identifier
bool onewire_master_function_write(uint8_t function, uint8_t *data, uint32_t bits)
issue function and write data
#define ONEWIRE_MASTER_PIN
GPIO pin.
waiting for slave response to reset pulse
void onewire_master_setup(void)
setup 1-wire peripheral
global definitions and methods (API)
#define GPIO(x)
get GPIO based on GPIO identifier
static bool onewire_master_read(void)
read bits on 1-Wire bus
#define RCC_TIM(x)
get RCC for timer based on TIM identifier
void TIM_ISR(2)
timer ISR to measure edge timing
library for 1-wire protocol as master
bool onewire_master_write_byte(uint8_t data)
write data byte
bool onewire_master_function_read(uint8_t function, uint8_t *data, uint32_t bits)
issue function and read data
bool onewire_master_rom_skip(void)
send SKIP ROM command (all slaves on the bus will be selected)
static bool onewire_master_write(void)
write bits on 1-Wire bus
vector_table_entry_t interrupt_table[NVIC_IRQ_COUNT]
table of interrupts which can set to user functions
to count the number of possible states
BusVoodoo runtime interrupt table.
static uint8_t * buffer
input/output buffer for read/write commands/functions
bool onewire_master_read_byte(uint8_t *data)
read data byte
static uint32_t buffer_size
size of buffer in bits
#define LENGTH(x)
get the length of an array
bool onewire_master_rom_match(uint64_t code)
send MATCH ROM command to select a specific slave
#define TIM(x)
get TIM based on TIM identifier
void onewire_master_release(void)
release 1-wire peripheral
static volatile bool slave_presence
if slaves have been detected
uint8_t onewire_master_crc(uint8_t *data, uint32_t length)
compute CRC for 1-Wire
bool onewire_master_reset(void)
send reset pulse
enum @0 onewire_master_state
state of 1-Wire communication
#define ONEWIRE_MASTER_TIMER
timer ID