|
#define | DEBUG false |
| enable debugging functionalities
|
|
#define | LENGTH(x) (sizeof(x) / sizeof((x)[0])) |
| get the length of an array
|
|
#define | CAT2(x, y) x##y |
| concatenate 2 arguments
|
|
#define | CAT3(x, y, z) x##y##z |
| concatenate 3 arguments
|
|
#define | CAT4(w, x, y, z) w##x##y##z |
| concatenate 4 arguments
|
|
#define | COMPUTE_BUILD_YEAR |
| build year as number More...
|
|
#define | COMPUTE_BUILD_DAY |
| build day as number More...
|
|
#define | BUILD_MONTH_IS_JAN (__DATE__[0] == 'J' && __DATE__[1] == 'a' && __DATE__[2] == 'n') |
| check if build month is January
|
|
#define | BUILD_MONTH_IS_FEB (__DATE__[0] == 'F') |
| check if build month is February
|
|
#define | BUILD_MONTH_IS_MAR (__DATE__[0] == 'M' && __DATE__[1] == 'a' && __DATE__[2] == 'r') |
| check if build month is March
|
|
#define | BUILD_MONTH_IS_APR (__DATE__[0] == 'A' && __DATE__[1] == 'p') |
| check if build month is April
|
|
#define | BUILD_MONTH_IS_MAY (__DATE__[0] == 'M' && __DATE__[1] == 'a' && __DATE__[2] == 'y') |
| check if build month is May
|
|
#define | BUILD_MONTH_IS_JUN (__DATE__[0] == 'J' && __DATE__[1] == 'u' && __DATE__[2] == 'n') |
| check if build month is June
|
|
#define | BUILD_MONTH_IS_JUL (__DATE__[0] == 'J' && __DATE__[1] == 'u' && __DATE__[2] == 'l') |
| check if build month is July
|
|
#define | BUILD_MONTH_IS_AUG (__DATE__[0] == 'A' && __DATE__[1] == 'u') |
| check if build month is August
|
|
#define | BUILD_MONTH_IS_SEP (__DATE__[0] == 'S') |
| check if build month is September
|
|
#define | BUILD_MONTH_IS_OCT (__DATE__[0] == 'O') |
| check if build month is October
|
|
#define | BUILD_MONTH_IS_NOV (__DATE__[0] == 'N') |
| check if build month is November
|
|
#define | BUILD_MONTH_IS_DEC (__DATE__[0] == 'D') |
| check if build month is December
|
|
#define | COMPUTE_BUILD_MONTH |
| build month as number More...
|
|
#define | BUILD_DATE_IS_BAD (__DATE__[0] == '?') |
| check if build date is unknown
|
|
#define | BUILD_YEAR ((BUILD_DATE_IS_BAD) ? 0 : COMPUTE_BUILD_YEAR) |
| build year as number if known, or 0 if unknown
|
|
#define | BUILD_MONTH ((BUILD_DATE_IS_BAD) ? 99 : COMPUTE_BUILD_MONTH) |
| build month as number if known, or 0 if unknown
|
|
#define | BUILD_DAY ((BUILD_DATE_IS_BAD) ? 99 : COMPUTE_BUILD_DAY) |
| build day as number if known, or 0 if unknown
|
|
#define | GPIO(x) CAT2(GPIO,x) |
| get GPIO based on GPIO identifier
|
|
#define | RCC_GPIO(x) CAT2(RCC_GPIO,x) |
| get RCC for GPIO based on GPIO identifier
|
|
#define | TIM(x) CAT2(TIM,x) |
| get TIM based on TIM identifier
|
|
#define | RCC_TIM(x) CAT2(RCC_TIM,x) |
| get RCC for timer based on TIM identifier
|
|
#define | NVIC_TIM_IRQ(x) CAT3(NVIC_TIM,x,_IRQ) |
| get NVIC IRQ for timer base on TIM identifier
|
|
#define | TIM_ISR(x) CAT3(tim,x,_isr) |
| get interrupt service routine for timer base on TIM identifier
|
|
#define | TIM_CH_PORT(x, y) CAT4(GPIO_BANK_TIM,x,_CH,y) |
| get port based on TIMx_CHy identifier
|
|
#define | TIM_CH_PIN(x, y) CAT4(GPIO_TIM,x,_CH,y) |
| get pin based on TIMx_CHy identifier
|
|
#define | RCC_TIM_CH(x, y) CAT4(RCC_TIM,x,_CH,y) |
| get RCC for port based on TIMx_CHy identifier
|
|
#define | RCC_TIM1_CH1 RCC_GPIOA |
| RCC for port for on TIM1_CH1.
|
|
#define | RCC_TIM1_CH2 RCC_GPIOA |
| RCC for port for on TIM1_CH2.
|
|
#define | RCC_TIM1_CH3 RCC_GPIOA |
| RCC for port for on TIM1_CH3.
|
|
#define | RCC_TIM1_CH4 RCC_GPIOA |
| RCC for port for on TIM1_CH4.
|
|
#define | RCC_TIM1_CH1N RCC_GPIOB |
| RCC for port for on TIM1_CH1N.
|
|
#define | RCC_TIM1_CH2N RCC_GPIOB |
| RCC for port for on TIM1_CH2N.
|
|
#define | RCC_TIM1_CH3N RCC_GPIOB |
| RCC for port for on TIM1_CH3N.
|
|
#define | RCC_TIM2_CH1_ETR RCC_GPIOA |
| RCC for port for on TIM2_CH1_ETR.
|
|
#define | RCC_TIM2_CH2 RCC_GPIOA |
| RCC for port for on TIM2_CH2.
|
|
#define | RCC_TIM2_CH3 RCC_GPIOA |
| RCC for port for on TIM2_CH3.
|
|
#define | RCC_TIM2_CH4 RCC_GPIOA |
| RCC for port for on TIM2_CH4.
|
|
#define | RCC_TIM3_CH1 RCC_GPIOA |
| RCC for port for on TIM3_CH1.
|
|
#define | RCC_TIM3_CH2 RCC_GPIOA |
| RCC for port for on TIM3_CH2.
|
|
#define | RCC_TIM3_CH3 RCC_GPIOB |
| RCC for port for on TIM3_CH3.
|
|
#define | RCC_TIM3_CH4 RCC_GPIOB |
| RCC for port for on TIM3_CH4.
|
|
#define | RCC_TIM4_CH1 RCC_GPIOB |
| RCC for port for on TIM4_CH1.
|
|
#define | RCC_TIM4_CH2 RCC_GPIOB |
| RCC for port for on TIM4_CH2.
|
|
#define | RCC_TIM4_CH3 RCC_GPIOB |
| RCC for port for on TIM4_CH3.
|
|
#define | RCC_TIM4_CH4 RCC_GPIOB |
| RCC for port for on TIM4_CH4.
|
|
#define | RCC_TIM5_CH1 RCC_GPIOA |
| RCC for port for on TIM5_CH1.
|
|
#define | RCC_TIM5_CH2 RCC_GPIOA |
| RCC for port for on TIM5_CH2.
|
|
#define | RCC_TIM5_CH3 RCC_GPIOA |
| RCC for port for on TIM5_CH3.
|
|
#define | RCC_TIM5_CH4 RCC_GPIOA |
| RCC for port for on TIM5_CH4.
|
|
#define | TIM_IC(x) CAT2(TIM_IC,x) |
| get TIM_IC based on CHx identifier
|
|
#define | TIM_IC_IN_TI(x) CAT2(TIM_IC_IN_TI,x) |
| get TIM_IC_IN_TI based on CHx identifier
|
|
#define | TIM_SR_CCIF(x) CAT3(TIM_SR_CC,x,IF) |
| get TIM_SR_CCxIF based on CHx identifier
|
|
#define | TIM_DIER_CCIE(x) CAT3(TIM_DIER_CC,x,IE) |
| get TIM_DIER_CCxIE based on CHx identifier
|
|
#define | TIM_CCR(x, y) CAT2(TIM_CCR,y)(TIM(x)) |
| get TIM_CCRy register based on TIMx_CHy identifier
|
|
#define | EXTI(x) CAT2(EXTI,x) |
| get external interrupt based on pin identifier
|
|
#define | NVIC_EXTI_IRQ(x) CAT3(NVIC_EXTI,x,_IRQ) |
| get NVIC IRQ for external interrupt base on external interrupt/pin
|
|
#define | NVIC_EXTI5_IRQ NVIC_EXTI9_5_IRQ |
| IRQ for line 9 to 5 for pin 5.
|
|
#define | NVIC_EXTI6_IRQ NVIC_EXTI9_5_IRQ |
| IRQ for line 9 to 5 for pin 6.
|
|
#define | NVIC_EXTI7_IRQ NVIC_EXTI9_5_IRQ |
| IRQ for line 9 to 5 for pin 7.
|
|
#define | NVIC_EXTI8_IRQ NVIC_EXTI9_5_IRQ |
| IRQ for line 9 to 5 for pin 8.
|
|
#define | NVIC_EXTI9_IRQ NVIC_EXTI9_5_IRQ |
| IRQ for line 9 to 5 for pin 9.
|
|
#define | NVIC_EXTI10_IRQ NVIC_EXTI15_10_IRQ |
| IRQ for line 15 to 10 for pin 10.
|
|
#define | NVIC_EXTI11_IRQ NVIC_EXTI15_10_IRQ |
| IRQ for line 15 to 10 for pin 11.
|
|
#define | NVIC_EXTI12_IRQ NVIC_EXTI15_10_IRQ |
| IRQ for line 15 to 10 for pin 12.
|
|
#define | NVIC_EXTI13_IRQ NVIC_EXTI15_10_IRQ |
| IRQ for line 15 to 10 for pin 13.
|
|
#define | NVIC_EXTI14_IRQ NVIC_EXTI15_10_IRQ |
| IRQ for line 15 to 10 for pin 14.
|
|
#define | NVIC_EXTI15_IRQ NVIC_EXTI15_10_IRQ |
| IRQ for line 15 to 10 for pin 15.
|
|
#define | EXTI_ISR(x) CAT3(exti,x,_isr) |
| get interrupt service routine for timer base on external interrupt/pin
|
|
#define | exti5_isr exti9_5_isr |
| isr for line 9 to 5 for pin 5
|
|
#define | exti6_isr exti9_5_isr |
| isr for line 9 to 5 for pin 6
|
|
#define | exti7_isr exti9_5_isr |
| isr for line 9 to 5 for pin 7
|
|
#define | exti8_isr exti9_5_isr |
| isr for line 9 to 5 for pin 8
|
|
#define | exti9_isr exti9_5_isr |
| isr for line 9 to 5 for pin 9
|
|
#define | exti10_isr exti15_10_isr |
| isr for line 15 to 10 for pin 10
|
|
#define | exti11_isr exti15_10_isr |
| isr for line 15 to 10 for pin 11
|
|
#define | exti12_isr exti15_10_isr |
| isr for line 15 to 10 for pin 12
|
|
#define | exti13_isr exti15_10_isr |
| isr for line 15 to 10 for pin 13
|
|
#define | exti14_isr exti15_10_isr |
| isr for line 15 to 10 for pin 14
|
|
#define | exti15_isr exti15_10_isr |
| isr for line 15 to 10 for pin 15
|
|
#define | USART(x) CAT2(USART,x) |
| get USART based on USART identifier
|
|
#define | RCC_USART(x) CAT2(RCC_USART,x) |
| get RCC for USART based on USART identifier
|
|
#define | USART_IRQ(x) CAT3(NVIC_USART,x,_IRQ) |
| get NVIC IRQ for USART based on USART identifier
|
|
#define | USART_ISR(x) CAT3(usart,x,_isr) |
| get interrupt service routine for USART based on USART identifier
|
|
#define | USART_TX_PORT(x) CAT3(GPIO_BANK_USART,x,_TX) |
| get port for USART transmit pin based on USART identifier
|
|
#define | USART_RX_PORT(x) CAT3(GPIO_BANK_USART,x,_RX) |
| get port for USART receive pin based on USART identifier
|
|
#define | USART_RTS_PORT(x) CAT3(GPIO_BANK_USART,x,_RTS) |
| get port for USART RTS pin based on USART identifier
|
|
#define | USART_CTS_PORT(x) CAT3(GPIO_BANK_USART,x,_CTS) |
| get port for USART CTS pin based on USART identifier
|
|
#define | USART_TX_PIN(x) CAT3(GPIO_USART,x,_TX) |
| get pin for USART transmit pin based on USART identifier
|
|
#define | USART_RX_PIN(x) CAT3(GPIO_USART,x,_RX) |
| get pin for USART receive pin based on USART identifier
|
|
#define | USART_RTS_PIN(x) CAT3(GPIO_USART,x,_RTS) |
| get pin for USART RTS pin based on USART identifier
|
|
#define | USART_CTS_PIN(x) CAT3(GPIO_USART,x,_CTS) |
| get pin for USART CTS pin based on USART identifier
|
|
#define | RCC_USART_PORT(x) CAT2(RCC_USART_PORT,x) |
| get RCC for USART port based on USART identifier
|
|
#define | RCC_USART_PORT1 RCC_GPIOA |
| USART 1 is on port A.
|
|
#define | RCC_USART_PORT2 RCC_GPIOA |
| USART 2 is on port A.
|
|
#define | RCC_USART_PORT3 RCC_GPIOB |
| USART 3 is on port B.
|
|
#define | ADC12_IN_PORT(x) CAT3(ADC12_IN,x,_PORT) |
| get port based on ADC12_IN identifier
|
|
#define | ADC12_IN0_PORT GPIOA |
| ADC12_IN0 is on PA0.
|
|
#define | ADC12_IN1_PORT GPIOA |
| ADC12_IN1 is on PA1.
|
|
#define | ADC12_IN2_PORT GPIOA |
| ADC12_IN2 is on PA2.
|
|
#define | ADC12_IN3_PORT GPIOA |
| ADC12_IN3 is on PA3.
|
|
#define | ADC12_IN4_PORT GPIOA |
| ADC12_IN4 is on PA4.
|
|
#define | ADC12_IN5_PORT GPIOA |
| ADC12_IN5 is on PA5.
|
|
#define | ADC12_IN6_PORT GPIOA |
| ADC12_IN6 is on PA6.
|
|
#define | ADC12_IN7_PORT GPIOA |
| ADC12_IN7 is on PA7.
|
|
#define | ADC12_IN8_PORT GPIOB |
| ADC12_IN8 is on PB0.
|
|
#define | ADC12_IN9_PORT GPIOB |
| ADC12_IN9 is on PB1.
|
|
#define | ADC12_IN10_PORT GPIOC |
| ADC12_IN10 is on PC0.
|
|
#define | ADC12_IN11_PORT GPIOC |
| ADC12_IN11 is on PC1.
|
|
#define | ADC12_IN12_PORT GPIOC |
| ADC12_IN12 is on PC2.
|
|
#define | ADC12_IN13_PORT GPIOC |
| ADC12_IN13 is on PC3.
|
|
#define | ADC12_IN14_PORT GPIOC |
| ADC12_IN14 is on PC4.
|
|
#define | ADC12_IN15_PORT GPIOC |
| ADC12_IN15 is on PC5.
|
|
#define | ADC12_IN_PIN(x) CAT3(ADC12_IN,x,_PIN) |
| get pin based on ADC12_IN identifier
|
|
#define | ADC12_IN0_PIN GPIO0 |
| ADC12_IN0 is on PA0.
|
|
#define | ADC12_IN1_PIN GPIO1 |
| ADC12_IN1 is on PA1.
|
|
#define | ADC12_IN2_PIN GPIO2 |
| ADC12_IN2 is on PA2.
|
|
#define | ADC12_IN3_PIN GPIO3 |
| ADC12_IN3 is on PA3.
|
|
#define | ADC12_IN4_PIN GPIO4 |
| ADC12_IN4 is on PA4.
|
|
#define | ADC12_IN5_PIN GPIO5 |
| ADC12_IN5 is on PA5.
|
|
#define | ADC12_IN6_PIN GPIO6 |
| ADC12_IN6 is on PA6.
|
|
#define | ADC12_IN7_PIN GPIO7 |
| ADC12_IN7 is on PA7.
|
|
#define | ADC12_IN8_PIN GPIO0 |
| ADC12_IN8 is on PB0.
|
|
#define | ADC12_IN9_PIN GPIO1 |
| ADC12_IN9 is on PB1.
|
|
#define | ADC12_IN10_PIN GPIO0 |
| ADC12_IN10 is on PC0.
|
|
#define | ADC12_IN11_PIN GPIO1 |
| ADC12_IN11 is on PC1.
|
|
#define | ADC12_IN12_PIN GPIO2 |
| ADC12_IN12 is on PC2.
|
|
#define | ADC12_IN13_PIN GPIO3 |
| ADC12_IN13 is on PC3.
|
|
#define | ADC12_IN14_PIN GPIO4 |
| ADC12_IN14 is on PC4.
|
|
#define | ADC12_IN15_PIN GPIO5 |
| ADC12_IN15 is on PC5.
|
|
#define | RCC_ADC12_IN(x) CAT2(RCC_ADC12_IN,x) |
| get RCC based on ADC12_IN identifier
|
|
#define | RCC_ADC12_IN0 RCC_GPIOA |
| ADC12_IN0 is on PA0.
|
|
#define | RCC_ADC12_IN1 RCC_GPIOA |
| ADC12_IN1 is on PA1.
|
|
#define | RCC_ADC12_IN2 RCC_GPIOA |
| ADC12_IN2 is on PA2.
|
|
#define | RCC_ADC12_IN3 RCC_GPIOA |
| ADC12_IN3 is on PA3.
|
|
#define | RCC_ADC12_IN4 RCC_GPIOA |
| ADC12_IN4 is on PA4.
|
|
#define | RCC_ADC12_IN5 RCC_GPIOA |
| ADC12_IN5 is on PA5.
|
|
#define | RCC_ADC12_IN6 RCC_GPIOA |
| ADC12_IN6 is on PA6.
|
|
#define | RCC_ADC12_IN7 RCC_GPIOA |
| ADC12_IN7 is on PA7.
|
|
#define | RCC_ADC12_IN8 RCC_GPIOB |
| ADC12_IN8 is on PB0.
|
|
#define | RCC_ADC12_IN9 RCC_GPIOB |
| ADC12_IN9 is on PB1.
|
|
#define | RCC_ADC12_IN10 RCC_GPIOC |
| ADC12_IN10 is on PC0.
|
|
#define | RCC_ADC12_IN11 RCC_GPIOC |
| ADC12_IN11 is on PC1.
|
|
#define | RCC_ADC12_IN12 RCC_GPIOC |
| ADC12_IN12 is on PC2.
|
|
#define | RCC_ADC12_IN13 RCC_GPIOC |
| ADC12_IN13 is on PC3.
|
|
#define | RCC_ADC12_IN14 RCC_GPIOC |
| ADC12_IN14 is on PC4.
|
|
#define | RCC_ADC12_IN15 RCC_GPIOC |
| ADC12_IN15 is on PC5.
|
|
#define | ADC_CHANNEL(x) CAT2(ADC_CHANNEL,x) |
| get channel based on ADC12_IN identifier
|
|
#define | SPI(x) CAT2(SPI,x) |
| get SPI based on SPI identifier
|
|
#define | RCC_SPI(x) CAT2(RCC_SPI,x) |
| get RCC for SPI based on SPI identifier
|
|
#define | RCC_SPI_NSS_PORT(x) CAT3(RCC_SPI,x,_NSS_PORT) |
| get RCC for GPIO port for SPI NSS signals
|
|
#define | RCC_SPI1_NSS_PORT RCC_GPIOA |
| RCC for GPIO port for NSS for SPI1.
|
|
#define | RCC_SPI1_RE_NSS_PORT RCC_GPIOA |
| RCC for GPIO port for NSS for SPI1_RE.
|
|
#define | RCC_SPI2_NSS_PORT RCC_GPIOB |
| RCC for GPIO port for NSS for SPI2.
|
|
#define | RCC_SPI_SCK_PORT(x) CAT3(RCC_SPI,x,_SCK_PORT) |
| get RCC for GPIO port for SPI SCK signals
|
|
#define | RCC_SPI1_SCK_PORT RCC_GPIOA |
| RCC for GPIO port for NSS for SPI1.
|
|
#define | RCC_SPI1_RE_SCK_PORT RCC_GPIOB |
| RCC for GPIO port for NSS for SPI1_RE.
|
|
#define | RCC_SPI2_SCK_PORT RCC_GPIOB |
| RCC for GPIO port for NSS for SPI2.
|
|
#define | RCC_SPI_MISO_PORT(x) CAT3(RCC_SPI,x,_MISO_PORT) |
| get RCC for GPIO port for SPI MISO signals
|
|
#define | RCC_SPI1_MISO_PORT RCC_GPIOA |
| RCC for GPIO port for NSS for SPI1.
|
|
#define | RCC_SPI1_RE_MISO_PORT RCC_GPIOB |
| RCC for GPIO port for NSS for SPI1_RE.
|
|
#define | RCC_SPI2_MISO_PORT RCC_GPIOB |
| RCC for GPIO port for NSS for SPI2.
|
|
#define | RCC_SPI_MOSI_PORT(x) CAT3(RCC_SPI,x,_MOSI_PORT) |
| get RCC for GPIO port for SPI MOSI signals
|
|
#define | RCC_SPI1_MOSI_PORT RCC_GPIOA |
| RCC for GPIO port for NSS for SPI1.
|
|
#define | RCC_SPI1_RE_MOSI_PORT RCC_GPIOB |
| RCC for GPIO port for NSS for SPI1_RE.
|
|
#define | RCC_SPI2_MOSI_PORT RCC_GPIOB |
| RCC for GPIO port for NSS for SPI2.
|
|
#define | SPI_NSS_PORT(x) CAT3(GPIO_BANK_SPI,x,_NSS) |
| get SPI port for NSS signal based on SPI identifier
|
|
#define | SPI_SCK_PORT(x) CAT3(GPIO_BANK_SPI,x,_SCK) |
| get SPI port for SCK signal based on SPI identifier
|
|
#define | SPI_MISO_PORT(x) CAT3(GPIO_BANK_SPI,x,_MISO) |
| get SPI port for MISO signal based on SPI identifier
|
|
#define | SPI_MOSI_PORT(x) CAT3(GPIO_BANK_SPI,x,_MOSI) |
| get SPI port for MOSI signal based on SPI identifier
|
|
#define | SPI_NSS_PIN(x) CAT3(GPIO_SPI,x,_NSS) |
| get SPI pin for NSS signal based on SPI identifier
|
|
#define | SPI_SCK_PIN(x) CAT3(GPIO_SPI,x,_SCK) |
| get SPI pin for SCK signal based on SPI identifier
|
|
#define | SPI_MISO_PIN(x) CAT3(GPIO_SPI,x,_MISO) |
| get SPI pin for MISO signal based on SPI identifier
|
|
#define | SPI_MOSI_PIN(x) CAT3(GPIO_SPI,x,_MOSI) |
| get SPI pin for MOSI signal based on SPI identifier
|
|
#define | SPI_CRC_PR(x) CAT3(SPI,x,_CRCPR) |
| get SPI CRC polynomial register based on SPI identifier
|
|
#define | SPI_CRC_TXR(x) CAT3(SPI,x,_TXCRCR) |
| get SPI CRC transmit register based on SPI identifier
|
|
#define | SPI_CRC_RXR(x) CAT3(SPI,x,_RXCRCR) |
| get SPI CRC receive register based on SPI identifier
|
|
#define | DMA_SPI(x) CAT2(DMA_SPI,x) |
| get DMA based on SPI identifier
|
|
#define | DMA_SPI1 DMA1 |
| SPI1 is on DMA1.
|
|
#define | DMA_SPI2 DMA1 |
| SPI2 is on DMA1.
|
|
#define | DMA_SPI3 DMA2 |
| SPI3 is on DMA2.
|
|
#define | RCC_DMA_SPI(x) CAT2(RCC_DMA_SPI,x) |
| get RCC for DMA based on SPI identifier
|
|
#define | RCC_DMA_SPI1 RCC_DMA1 |
| SPI1 is on DMA1.
|
|
#define | RCC_DMA_SPI2 RCC_DMA1 |
| SPI2 is on DMA1.
|
|
#define | RCC_DMA_SPI3 RCC_DMA2 |
| SPI3 is on DMA2.
|
|
#define | DMA_CHANNEL_SPI_TX(x) CAT3(DMA_CHANNEL_SPI,x,_TX) |
| get DMA channel for SPI TX based on SPI identifier
|
|
#define | DMA_CHANNEL_SPI1_TX DMA_CHANNEL3 |
| SPI1 TX is on DMA channel 3.
|
|
#define | DMA_CHANNEL_SPI2_TX DMA_CHANNEL5 |
| SPI2 TX is on DMA channel 5.
|
|
#define | DMA_CHANNEL_SPI3_TX DMA_CHANNEL2 |
| SPI3 TX is on DMA channel 2.
|
|
#define | DMA_CHANNEL_SPI_RX(x) CAT3(DMA_CHANNEL_SPI,x,_RX) |
| get DMA channel for SPI RX based on SPI identifier
|
|
#define | DMA_CHANNEL_SPI1_RX DMA_CHANNEL4 |
| SPI1 RX is on DMA channel 4.
|
|
#define | DMA_CHANNEL_SPI2_RX DMA_CHANNEL2 |
| SPI2 RX is on DMA channel 2.
|
|
#define | DMA_CHANNEL_SPI3_RX DMA_CHANNEL1 |
| SPI3 RX is on DMA channel 1.
|
|
#define | DMA_IRQ_SPI_TX(x) CAT3(NVIC_DMA_CHANNEL_IRQ_SPI,x,_TX) |
| get DMA NVIC IRQ for SPI TX based on SPI identifier
|
|
#define | NVIC_DMA_CHANNEL_IRQ_SPI1_TX NVIC_DMA1_CHANNEL3_IRQ |
| SPI1 TX is on DMA 1 channel 3.
|
|
#define | NVIC_DMA_CHANNEL_IRQ_SPI2_TX NVIC_DMA1_CHANNEL5_IRQ |
| SPI2 TX is on DMA 1 channel 5.
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#define | NVIC_DMA_CHANNEL_IRQ_SPI3_TX NVIC_DMA2_CHANNEL2_IRQ |
| SPI3 TX is on DMA 2 channel 2.
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#define | DMA_IRQ_SPI_RX(x) CAT3(NVIC_DMA_CHANNEL_IRQ_SPI,x,_RX) |
| get DMA NVIC IRQ for SPI RX based on SPI identifier
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#define | NVIC_DMA_CHANNEL_IRQ_SPI1_RX NVIC_DMA1_CHANNEL4_IRQ |
| SPI1 RX is on DMA 1 channel 4.
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#define | NVIC_DMA_CHANNEL_IRQ_SPI2_RX NVIC_DMA1_CHANNEL2_IRQ |
| SPI2 RX is on DMA 1 channel 2.
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#define | NVIC_DMA_CHANNEL_IRQ_SPI3_RX NVIC_DMA2_CHANNEL1_IRQ |
| SPI3 RX is on DMA 2 channel 1.
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#define | DMA_ISR_SPI_TX(x) CAT3(DMA_CHANNEL_ISR_SPI,x,_TX) |
| get DMA ISR for SPI TX based on SPI identifier
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#define | DMA_CHANNEL_ISR_SPI1_TX dma1_channel3_isr |
| SPI1 TX is on DMA 1 channel 3.
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#define | DMA_CHANNEL_ISR_SPI2_TX dma1_channel5_isr |
| SPI2 TX is on DMA 1 channel 5.
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#define | DMA_CHANNEL_ISR_SPI3_TX dma2_channel2_isr |
| SPI3 TX is on DMA 2 channel 2.
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#define | DMA_ISR_SPI_RX(x) CAT3(DMA_CHANNEL_ISR_SPI,x,_RX) |
| get DMA ISR for SPI RX based on SPI identifier
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#define | DMA_CHANNEL_ISR_SPI1_RX dma1_channel4_isr |
| SPI1 RX is on DMA 1 channel 4.
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#define | DMA_CHANNEL_ISR_SPI2_RX dma1_channel2_isr |
| SPI2 RX is on DMA 1 channel 2.
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#define | DMA_CHANNEL_ISR_SPI3_RX dma2_channel1_isr |
| SPI3 RX is on DMA 2 channel 1.
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#define | DFU_FORCE_PORT B |
| JNTRST port (needs to be remapped to become PB4)
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#define | DFU_FORCE_PIN 4 |
| JNTRST pin (needs to be remapped to become PB4)
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#define | DFU_FORCE_VALUE 1 |
| must be high to force DFU mode, since it's low after reset
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