CuVoodoo STM32F1 firmware template
i2c_master.c
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1 /* This program is free software: you can redistribute it and/or modify
2  * it under the terms of the GNU General Public License as published by
3  * the Free Software Foundation, either version 3 of the License, or
4  * (at your option) any later version.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program. If not, see <http://www.gnu.org/licenses/>.
13  *
14  */
22 /* standard libraries */
23 #include <stdint.h> // standard integer types
24 #include <stdlib.h> // general utilities
25 
26 /* STM32 (including CM3) libraries */
27 #include <libopencm3/stm32/rcc.h> // real-time control clock library
28 #include <libopencm3/stm32/gpio.h> // general purpose input output library
29 #include <libopencm3/stm32/i2c.h> // I2C library
30 
31 /* own libraries */
32 #include "global.h" // global utilities
33 #include "i2c_master.h" // I2C header and definitions
34 
39 static uint32_t RCC_I2C(uint32_t i2c)
40 {
41  switch (i2c) {
42  case I2C1:
43  return RCC_I2C1;
44  break;
45  case I2C2:
46  return RCC_I2C2;
47  break;
48  default:
49  while (true);
50  }
51 }
52 
57 static uint32_t RCC_GPIO_PORT_SCL(uint32_t i2c)
58 {
59  switch (i2c) {
60  case I2C1:
61  case I2C2:
62  return RCC_GPIOB;
63  break;
64  default:
65  while (true);
66  }
67 }
68 
73 static uint32_t RCC_GPIO_PORT_SDA(uint32_t i2c)
74 {
75  switch (i2c) {
76  case I2C1:
77  case I2C2:
78  return RCC_GPIOB;
79  break;
80  default:
81  while (true);
82  }
83 }
84 
89 static uint32_t GPIO_PORT_SCL(uint32_t i2c)
90 {
91  switch (i2c) {
92  case I2C1:
93  if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
94  return GPIO_BANK_I2C1_RE_SCL;
95  } else {
96  return GPIO_BANK_I2C1_SCL;
97  }
98  break;
99  case I2C2:
100  return GPIO_BANK_I2C2_SCL;
101  break;
102  default:
103  while (true);
104  }
105 }
106 
111 static uint32_t GPIO_PORT_SDA(uint32_t i2c)
112 {
113  switch (i2c) {
114  case I2C1:
115  if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
116  return GPIO_BANK_I2C1_RE_SDA;
117  } else {
118  return GPIO_BANK_I2C1_SDA;
119  }
120  break;
121  case I2C2:
122  return GPIO_BANK_I2C2_SDA;
123  break;
124  default:
125  while (true);
126  }
127 }
128 
133 static uint32_t GPIO_PIN_SCL(uint32_t i2c)
134 {
135  switch (i2c) {
136  case I2C1:
137  if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
138  return GPIO_I2C1_RE_SCL;
139  } else {
140  return GPIO_I2C1_SCL;
141  }
142  break;
143  case I2C2:
144  return GPIO_I2C2_SCL;
145  break;
146  default:
147  while (true);
148  }
149 }
150 
155 static uint32_t GPIO_PIN_SDA(uint32_t i2c)
156 {
157  switch (i2c) {
158  case I2C1:
159  if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
160  return GPIO_I2C1_RE_SDA;
161  } else {
162  return GPIO_I2C1_SDA;
163  }
164  break;
165  case I2C2:
166  return GPIO_I2C2_SDA;
167  break;
168  default:
169  while (true);
170  }
171 }
172 
173 void i2c_master_setup(uint32_t i2c, uint16_t frequency)
174 {
175  // check I2C peripheral
176  if (I2C1!=i2c && I2C2!=i2c) {
177  while (true);
178  }
179 
180  // configure I2C peripheral
181  rcc_periph_clock_enable(RCC_GPIO_PORT_SCL(i2c)); // enable clock for I2C I/O peripheral
182  gpio_set(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // already put signal high to avoid small pulse
183  gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SCL(i2c)); // setup I2C I/O pins
184  rcc_periph_clock_enable(RCC_GPIO_PORT_SDA(i2c)); // enable clock for I2C I/O peripheral
185  gpio_set(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // already put signal high to avoid small pulse
186  gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SDA(i2c)); // setup I2C I/O pins
187  rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function
188  rcc_periph_clock_enable(RCC_I2C(i2c)); // enable clock for I2C peripheral
189  i2c_reset(i2c); // reset peripheral domain
190  i2c_peripheral_disable(i2c); // I2C needs to be disable to be configured
191  I2C_CR1(i2c) |= I2C_CR1_SWRST; // reset peripheral
192  I2C_CR1(i2c) &= ~I2C_CR1_SWRST; // clear peripheral reset
193  if (0==frequency) { // don't allow null frequency
194  frequency = 1;
195  } else if (frequency>400) { // limit frequency to 400 kHz
196  frequency = 400;
197  }
198  i2c_set_clock_frequency(i2c, rcc_apb1_frequency/1000000); // configure the peripheral clock to the APB1 freq (where it is connected to)
199  if (frequency>100) { // use fast mode for frequencies over 100 kHz
200  i2c_set_fast_mode(i2c); // set fast mode (Fm)
201  i2c_set_ccr(i2c, rcc_apb1_frequency/(frequency*1000*2)); // set Thigh/Tlow to generate frequency (fast duty not used)
202  i2c_set_trise(i2c, (300/(1000/(rcc_apb1_frequency/1000000)))+1); // max rise time for Fm mode (< 400) kHz is 300 ns
203  } else { // use fast mode for frequencies below 100 kHz
204  i2c_set_standard_mode(i2c); // set standard mode (Sm)
205  i2c_set_ccr(i2c, rcc_apb1_frequency/(frequency*1000*2)); // set Thigh/Tlow to generate frequency of 100 kHz
206  i2c_set_trise(i2c, (1000/(1000/(rcc_apb1_frequency/1000000)))+1); // max rise time for Sm mode (< 100 kHz) is 1000 ns (~1 MHz)
207  }
208  i2c_peripheral_enable(i2c); // enable I2C after configuration completed
209 }
210 
211 void i2c_master_release(uint32_t i2c)
212 {
213  // check I2C peripheral
214  if (I2C1!=i2c && I2C2!=i2c) {
215  while (true);
216  }
217 
218  i2c_reset(i2c); // reset I2C peripheral configuration
219  i2c_peripheral_disable(i2c); // disable I2C peripheral
220  rcc_periph_clock_disable(RCC_I2C(i2c)); // disable clock for I2C peripheral
221  gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_PIN_SCL(i2c)); // put I2C I/O pins back to floating
222  gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_PIN_SDA(i2c)); // put I2C I/O pins back to floating
223 }
224 
225 bool i2c_master_check_signals(uint32_t i2c)
226 {
227  // check I2C peripheral
228  if (I2C1!=i2c && I2C2!=i2c) {
229  while (true);
230  }
231 
232  return (0!=gpio_get(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)) && 0!=gpio_get(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)));
233 }
234 
235 void i2c_master_reset(uint32_t i2c)
236 {
237  // check I2C peripheral
238  if (I2C1!=i2c && I2C2!=i2c) {
239  while (true);
240  }
241 
242  // follow procedure described in STM32F10xxC/D/E Errata sheet, Section 2.14.7
243  i2c_peripheral_disable(i2c); // disable i2c peripheral
244  gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN_SCL(i2c)); // put I2C I/O pins to general output
245  gpio_set(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // set high
246  while (!gpio_get(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c))); // ensure it is high
247  gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO_PIN_SDA(i2c)); // put I2C I/O pins to general output
248  gpio_set(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // set high
249  while (!gpio_get(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c))); // ensure it is high
250  gpio_clear(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // set low (try first transition)
251  while (gpio_get(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c))); // ensure it is low
252  gpio_clear(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // set low (try first transition)
253  while (gpio_get(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c))); // ensure it is low
254  gpio_set(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // set high (try second transition)
255  while (!gpio_get(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c))); // ensure it is high
256  gpio_set(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // set high (try second transition)
257  while (!gpio_get(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c))); // ensure it is high
258  gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SCL(i2c)); // set I2C I/O pins back
259  gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_10_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SDA(i2c)); // set I2C I/O pins back
260  I2C_CR1(i2c) |= I2C_CR1_SWRST; // reset device
261  I2C_CR1(i2c) &= ~I2C_CR1_SWRST; // reset device
262  i2c_peripheral_enable(i2c); // re-enable device
263 }
264 
265 enum i2c_master_rc i2c_master_start(uint32_t i2c)
266 {
267  // check I2C peripheral
268  if (I2C1!=i2c && I2C2!=i2c) {
269  while (true);
270  }
271 
272  // send (re-)start condition
273  if (I2C_CR1(i2c) & (I2C_CR1_START|I2C_CR1_STOP)) { // ensure start or stop operations are not in progress
275  }
276  i2c_send_start(i2c); // send start condition to start transaction
277  while (I2C_CR1(i2c) & I2C_CR1_START); // wait until start condition has been accepted and cleared
278  while ((I2C_CR1(i2c) & I2C_CR1_START)); // wait until start condition is accepted and cleared
279  while (!(I2C_SR1(i2c) & I2C_SR1_SB)); // wait until start condition is transmitted
280  if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // verify if in master mode
282  }
283 
284  return I2C_MASTER_RC_NONE;
285 }
286 
287 enum i2c_master_rc i2c_master_select_slave(uint32_t i2c, uint16_t slave, bool address_10bit, bool write)
288 {
289  // check I2C peripheral
290  if (I2C1!=i2c && I2C2!=i2c) {
291  while (true);
292  }
293 
294  enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
295  if (!(I2C_SR1(i2c) & I2C_SR1_SB)) { // start condition has not been sent
296  rc = i2c_master_start(i2c); // send start condition
297  if (I2C_MASTER_RC_NONE!=rc) {
298  return rc;
299  }
300  }
301  if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I2C device is not in master mode
303  }
304 
305  // select slave
306  if (!address_10bit) { // 7-bit address
307  I2C_SR1(i2c) &= ~(I2C_SR1_AF); // clear acknowledgement failure
308  i2c_send_7bit_address(i2c, slave, write ? I2C_WRITE : I2C_READ); // select slave, with read/write flag
309  while (!(I2C_SR1(i2c) & (I2C_SR1_ADDR|I2C_SR1_AF))); // wait until address is transmitted
310  if (I2C_SR1(i2c) & I2C_SR1_AF) { // address has not been acknowledged
311  return I2C_MASTER_RC_NAK;
312  }
313  } else { // 10-bit address
314  // send first part of address
315  I2C_SR1(i2c) &= ~(I2C_SR1_AF); // clear acknowledgement failure
316  I2C_DR(i2c) = 11110000 | (((slave>>8)&0x3)<<1); // send first header (11110xx0, where xx are 2 MSb of slave address)
317  while (!(I2C_SR1(i2c) & (I2C_SR1_ADD10|I2C_SR1_AF))); // wait until first part of address is transmitted
318  if (I2C_SR1(i2c) & I2C_SR1_AF) { // address has not been acknowledged
319  return I2C_MASTER_RC_NAK;
320  }
321  // send second part of address
322  I2C_SR1(i2c) &= ~(I2C_SR1_AF); // clear acknowledgement failure
323  I2C_DR(i2c) = (slave&0xff); // send remaining of address
324  while (!(I2C_SR1(i2c) & (I2C_SR1_ADDR|I2C_SR1_AF))); // wait until remaining part of address is transmitted
325  if (I2C_SR1(i2c) & I2C_SR1_AF) { // address has not been acknowledged
326  return I2C_MASTER_RC_NAK;
327  }
328  // go into receive mode if necessary
329  if (!write) {
330  rc = i2c_master_start(i2c); // send start condition
331  if (I2C_MASTER_RC_NONE!=rc) {
332  return rc;
333  }
334  // send first part of address with receive flag
335  I2C_SR1(i2c) &= ~(I2C_SR1_AF); // clear acknowledgement failure
336  I2C_DR(i2c) = 11110001 | (((slave>>8)&0x3)<<1); // send header (11110xx1, where xx are 2 MSb of slave address)
337  while (!(I2C_SR1(i2c) & (I2C_SR1_ADDR|I2C_SR1_AF))); // wait until remaining part of address is transmitted
338  if (I2C_SR1(i2c) & I2C_SR1_AF) { // address has not been acknowledged
339  return I2C_MASTER_RC_NAK;
340  }
341  }
342  }
343  if (write) {
344  if (!((I2C_SR2(i2c) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
346  }
347  } else {
348  if ((I2C_SR2(i2c) & I2C_SR2_TRA)) { // verify we are in read mode (and read SR2 to clear ADDR)
350  }
351  }
352 
353  return I2C_MASTER_RC_NONE;
354 }
355 
356 enum i2c_master_rc i2c_master_read(uint32_t i2c, uint8_t* data, size_t data_size)
357 {
358  // check I2C peripheral
359  if (I2C1!=i2c && I2C2!=i2c) {
360  while (true);
361  }
362 
363  // sanity check
364  if (data==NULL || data_size==0) { // no data to read
365  return I2C_MASTER_RC_NONE;
366  }
367  if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I2C device is not master
369  }
370  if ((I2C_SR2(i2c) & I2C_SR2_TRA)) { // I2C device not in receiver mode
372  }
373  if (I2C_SR1(i2c) & I2C_SR1_AF) { // check if the previous transaction went well
375  }
376 
377  // read data
378  for (size_t i=0; i<data_size; i++) { // read bytes
379  if (i==data_size-1) { // prepare to sent NACK for last byte
380  i2c_disable_ack(i2c); // NACK received to stop slave transmission
381  } else {
382  i2c_enable_ack(i2c); // ACK received byte to continue slave transmission
383  }
384  while (!(I2C_SR1(i2c) & I2C_SR1_RxNE)); // wait until byte has been received
385  data[i] = i2c_get_data(i2c); // read received byte
386  }
387 
388  return I2C_MASTER_RC_NONE;
389 }
390 
391 enum i2c_master_rc i2c_master_write(uint32_t i2c, const uint8_t* data, size_t data_size)
392 {
393  // check I2C peripheral
394  if (I2C1!=i2c && I2C2!=i2c) {
395  while (true);
396  }
397 
398  // sanity check
399  if (data==NULL || data_size==0) { // no data to write
400  return I2C_MASTER_RC_NONE;
401  }
402  if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I2C device is not master
404  }
405  if (!(I2C_SR2(i2c) & I2C_SR2_TRA)) { // I2C device not in transmitter mode
407  }
408  if (I2C_SR1(i2c) & I2C_SR1_AF) { // check if the previous transaction went well
410  }
411 
412  // write data
413  for (size_t i=0; i<data_size; i++) { // write bytes
414  I2C_SR1(i2c) &= ~(I2C_SR1_AF); // clear acknowledgement failure
415  i2c_send_data(i2c, data[i]); // send byte to be written in memory
416  while (!(I2C_SR1(i2c) & (I2C_SR1_TxE|I2C_SR1_AF))); // wait until byte has been transmitted
417  if (I2C_SR1(i2c) & I2C_SR1_AF) { // data has not been acknowledged
418  return I2C_MASTER_RC_NAK;
419  }
420  }
421 
422  return I2C_MASTER_RC_NONE;
423 }
424 
425 enum i2c_master_rc i2c_master_stop(uint32_t i2c)
426 {
427  // check I2C peripheral
428  if (I2C1!=i2c && I2C2!=i2c) {
429  while (true);
430  }
431 
432  // sanity check
433  if (!(I2C_SR2(i2c) & I2C_SR2_BUSY)) { // release is not busy
434  return I2C_MASTER_RC_NONE; // bus has probably already been released
435  }
436  // send stop condition
437  if (I2C_CR1(i2c) & (I2C_CR1_START|I2C_CR1_STOP)) { // ensure start or stop operations are not in progress
439  }
440 
441  i2c_send_stop(i2c); // send stop to release bus
442  while ((I2C_CR1(i2c) & I2C_CR1_STOP)); // wait until stop condition is accepted and cleared
443  while ((I2C_SR2(i2c) & I2C_SR2_MSL)); // wait until bus released (non master mode)
444 
445  return I2C_MASTER_RC_NONE;
446 }
447 
448 enum i2c_master_rc i2c_master_slave_read(uint32_t i2c, uint16_t slave, bool address_10bit, uint8_t* data, size_t data_size)
449 {
450  // check I2C peripheral
451  if (I2C1!=i2c && I2C2!=i2c) {
452  while (true);
453  }
454 
455  enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
456  rc = i2c_master_start(i2c); // send (re-)start condition
457  if (I2C_MASTER_RC_NONE!=rc) {
458  return rc;
459  }
460  rc = i2c_master_select_slave(i2c, slave, address_10bit, false); // select slave to read
461  if (I2C_MASTER_RC_NONE!=rc) {
462  goto error;
463  }
464  if (NULL!=data && data_size>0) { // only read data if needed
465  rc = i2c_master_read(i2c, data, data_size);
466  if (I2C_MASTER_RC_NONE!=rc) {
467  goto error;
468  }
469  }
470 
471  rc = I2C_MASTER_RC_NONE; // all went well
472 error:
473  i2c_master_stop(i2c); // sent stop condition
474  return rc;
475 }
476 
477 enum i2c_master_rc i2c_master_slave_write(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t* data, size_t data_size)
478 {
479  // check I2C peripheral
480  if (I2C1!=i2c && I2C2!=i2c) {
481  while (true);
482  }
483 
484  enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
485  rc = i2c_master_start(i2c); // send (re-)start condition
486  if (I2C_MASTER_RC_NONE!=rc) {
487  return rc;
488  }
489  rc = i2c_master_select_slave(i2c, slave, address_10bit, true); // select slave to write
490  if (I2C_MASTER_RC_NONE!=rc) {
491  goto error;
492  }
493  if (NULL!=data && data_size>0) { // write data only is some is available
494  rc = i2c_master_write(i2c, data, data_size); // write data
495  if (I2C_MASTER_RC_NONE!=rc) {
496  goto error;
497  }
498  }
499 
500  rc = I2C_MASTER_RC_NONE; // all went well
501 error:
502  i2c_master_stop(i2c); // sent stop condition
503  return rc;
504 }
505 
506 enum i2c_master_rc i2c_master_address_read(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size)
507 {
508  // check I2C peripheral
509  if (I2C1!=i2c && I2C2!=i2c) {
510  while (true);
511  }
512 
513  enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
514  rc = i2c_master_start(i2c); // send (re-)start condition
515  if (I2C_MASTER_RC_NONE!=rc) {
516  return rc;
517  }
518  rc = i2c_master_select_slave(i2c, slave, address_10bit, true); // select slave to write
519  if (I2C_MASTER_RC_NONE!=rc) {
520  goto error;
521  }
522 
523  // write address
524  if (NULL!=address && address_size>0) {
525  rc = i2c_master_write(i2c, address, address_size); // send memory address
526  if (I2C_MASTER_RC_NONE!=rc) {
527  goto error;
528  }
529  }
530  // read data
531  if (NULL!=data && data_size>0) {
532  rc = i2c_master_start(i2c); // send re-start condition
533  if (I2C_MASTER_RC_NONE!=rc) {
534  return rc;
535  }
536  rc = i2c_master_select_slave(i2c, slave, address_10bit, false); // select slave to read
537  if (I2C_MASTER_RC_NONE!=rc) {
538  goto error;
539  }
540  rc = i2c_master_read(i2c, data, data_size); // read memory
541  if (I2C_MASTER_RC_NONE!=rc) {
542  goto error;
543  }
544  }
545 
546  rc = I2C_MASTER_RC_NONE; // all went well
547 error:
548  i2c_master_stop(i2c); // sent stop condition
549  return rc;
550 }
551 
552 enum i2c_master_rc i2c_master_address_write(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size)
553 {
554  // check I2C peripheral
555  if (I2C1!=i2c && I2C2!=i2c) {
556  while (true);
557  }
558 
559  enum i2c_master_rc rc = I2C_MASTER_RC_NONE; // to store I2C return codes
560  rc = i2c_master_start(i2c); // send (re-)start condition
561  if (I2C_MASTER_RC_NONE!=rc) {
562  return rc;
563  }
564  rc = i2c_master_select_slave(i2c, slave, address_10bit, true); // select slave to write
565  if (I2C_MASTER_RC_NONE!=rc) {
566  goto error;
567  }
568 
569  // write address
570  if (NULL!=address && address_size>0) {
571  rc = i2c_master_write(i2c, address, address_size); // send memory address
572  if (I2C_MASTER_RC_NONE!=rc) {
573  goto error;
574  }
575  }
576  // read data
577  if (NULL!=data && data_size>0) {
578  rc = i2c_master_write(i2c, data, data_size); // write memory
579  if (I2C_MASTER_RC_NONE!=rc) {
580  goto error;
581  }
582  }
583 
584  rc = I2C_MASTER_RC_NONE; // all went well
585 error:
586  i2c_master_stop(i2c); // sent stop condition
587  return rc;
588 }
library to communicate using I2C as master (API)
enum i2c_master_rc i2c_master_stop(uint32_t i2c)
sent stop condition
Definition: i2c_master.c:425
enum i2c_master_rc i2c_master_select_slave(uint32_t i2c, uint16_t slave, bool address_10bit, bool write)
select I2C slave device
Definition: i2c_master.c:287
not in receive mode
Definition: i2c_master.h:29
enum i2c_master_rc i2c_master_read(uint32_t i2c, uint8_t *data, size_t data_size)
read data over I2C
Definition: i2c_master.c:356
void i2c_master_reset(uint32_t i2c)
reset I2C peripheral, fixing any locked state
Definition: i2c_master.c:235
enum i2c_master_rc i2c_master_start(uint32_t i2c)
send start condition
Definition: i2c_master.c:265
global definitions and methods (API)
not in master mode
Definition: i2c_master.h:27
enum i2c_master_rc i2c_master_slave_read(uint32_t i2c, uint16_t slave, bool address_10bit, uint8_t *data, size_t data_size)
read data from slave device
Definition: i2c_master.c:448
static uint32_t RCC_GPIO_PORT_SDA(uint32_t i2c)
get RCC for GPIO port for SDA pin based on I2C identifier
Definition: i2c_master.c:73
enum i2c_master_rc i2c_master_write(uint32_t i2c, const uint8_t *data, size_t data_size)
write data over I2C
Definition: i2c_master.c:391
a start or stop condition is already in progress
Definition: i2c_master.h:26
void i2c_master_setup(uint32_t i2c, uint16_t frequency)
setup I2C peripheral
Definition: i2c_master.c:173
static uint32_t GPIO_PORT_SDA(uint32_t i2c)
get GPIO port for SDA pin based on I2C identifier
Definition: i2c_master.c:111
void i2c_master_release(uint32_t i2c)
release I2C peripheral
Definition: i2c_master.c:211
static uint32_t RCC_I2C(uint32_t i2c)
get RCC for I2C based on I2C identifier
Definition: i2c_master.c:39
static uint32_t GPIO_PIN_SCL(uint32_t i2c)
get GPIO pin for SCL pin based on I2C identifier
Definition: i2c_master.c:133
static uint32_t GPIO_PIN_SDA(uint32_t i2c)
get GPIO pin for SDA pin based on I2C identifier
Definition: i2c_master.c:155
enum i2c_master_rc i2c_master_slave_write(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t *data, size_t data_size)
write data to slave device
Definition: i2c_master.c:477
static uint32_t RCC_GPIO_PORT_SCL(uint32_t i2c)
get RCC for GPIO port for SCL pin based on I2C identifier
Definition: i2c_master.c:57
enum i2c_master_rc i2c_master_address_read(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t *address, size_t address_size, uint8_t *data, size_t data_size)
read data at specific address from an I2C memory slave
Definition: i2c_master.c:506
static uint32_t GPIO_PORT_SCL(uint32_t i2c)
get GPIO port for SCL pin based on I2C identifier
Definition: i2c_master.c:89
slave is not read (previous operations has been nacked)
Definition: i2c_master.h:30
bool i2c_master_check_signals(uint32_t i2c)
check if SDA and SCL signals are high
Definition: i2c_master.c:225
i2c_master_rc
I2C return codes.
Definition: i2c_master.h:24
not in transmit mode
Definition: i2c_master.h:28
enum i2c_master_rc i2c_master_address_write(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t *address, size_t address_size, const uint8_t *data, size_t data_size)
write data at specific address on an I2C memory slave
Definition: i2c_master.c:552
not acknowledge received
Definition: i2c_master.h:31