/* This file is part of the libopencm3 project.
 *
 * It was generated by the irq2nvic_h script.
 *
 * This part needs to get included in the compilation unit where
 * blocking_handler gets defined due to the way #pragma works.
 */


/** @defgroup CM3_nvic_isrpragmas_SAM3N User interrupt service routines (ISR) defaults for Atmel SAM3N series
    @ingroup CM3_nvic_isrpragmas

    @{*/

#pragma weak supc_isr = blocking_handler
#pragma weak rstc_isr = blocking_handler
#pragma weak rtc_isr = blocking_handler
#pragma weak rtt_isr = blocking_handler
#pragma weak wdt_isr = blocking_handler
#pragma weak pmc_isr = blocking_handler
#pragma weak eefc_isr = blocking_handler
#pragma weak reserved0_isr = blocking_handler
#pragma weak uart0_isr = blocking_handler
#pragma weak uart1_isr = blocking_handler
#pragma weak reserved1_isr = blocking_handler
#pragma weak pioa_isr = blocking_handler
#pragma weak piob_isr = blocking_handler
#pragma weak pioc_isr = blocking_handler
#pragma weak usart0_isr = blocking_handler
#pragma weak usart1_isr = blocking_handler
#pragma weak reserved2_isr = blocking_handler
#pragma weak reserved3_isr = blocking_handler
#pragma weak reserved4_isr = blocking_handler
#pragma weak twi0_isr = blocking_handler
#pragma weak twi1_isr = blocking_handler
#pragma weak spi_isr = blocking_handler
#pragma weak reserved5_isr = blocking_handler
#pragma weak tc0_isr = blocking_handler
#pragma weak tc1_isr = blocking_handler
#pragma weak tc2_isr = blocking_handler
#pragma weak tc3_isr = blocking_handler
#pragma weak tc4_isr = blocking_handler
#pragma weak tc5_isr = blocking_handler
#pragma weak adc_isr = blocking_handler
#pragma weak dacc_isr = blocking_handler
#pragma weak pwm_isr = blocking_handler

/**@}*/

/* Initialization template for the interrupt vector table. This definition is
 * used by the startup code generator (vector.c) to set the initial values for
 * the interrupt handling routines to the chip family specific _isr weak
 * symbols. */

#define IRQ_HANDLERS \
    [NVIC_SUPC_IRQ] = supc_isr, \
    [NVIC_RSTC_IRQ] = rstc_isr, \
    [NVIC_RTC_IRQ] = rtc_isr, \
    [NVIC_RTT_IRQ] = rtt_isr, \
    [NVIC_WDT_IRQ] = wdt_isr, \
    [NVIC_PMC_IRQ] = pmc_isr, \
    [NVIC_EEFC_IRQ] = eefc_isr, \
    [NVIC_RESERVED0_IRQ] = reserved0_isr, \
    [NVIC_UART0_IRQ] = uart0_isr, \
    [NVIC_UART1_IRQ] = uart1_isr, \
    [NVIC_RESERVED1_IRQ] = reserved1_isr, \
    [NVIC_PIOA_IRQ] = pioa_isr, \
    [NVIC_PIOB_IRQ] = piob_isr, \
    [NVIC_PIOC_IRQ] = pioc_isr, \
    [NVIC_USART0_IRQ] = usart0_isr, \
    [NVIC_USART1_IRQ] = usart1_isr, \
    [NVIC_RESERVED2_IRQ] = reserved2_isr, \
    [NVIC_RESERVED3_IRQ] = reserved3_isr, \
    [NVIC_RESERVED4_IRQ] = reserved4_isr, \
    [NVIC_TWI0_IRQ] = twi0_isr, \
    [NVIC_TWI1_IRQ] = twi1_isr, \
    [NVIC_SPI_IRQ] = spi_isr, \
    [NVIC_RESERVED5_IRQ] = reserved5_isr, \
    [NVIC_TC0_IRQ] = tc0_isr, \
    [NVIC_TC1_IRQ] = tc1_isr, \
    [NVIC_TC2_IRQ] = tc2_isr, \
    [NVIC_TC3_IRQ] = tc3_isr, \
    [NVIC_TC4_IRQ] = tc4_isr, \
    [NVIC_TC5_IRQ] = tc5_isr, \
    [NVIC_ADC_IRQ] = adc_isr, \
    [NVIC_DACC_IRQ] = dacc_isr, \
    [NVIC_PWM_IRQ] = pwm_isr
