27 #include <libopencm3/stm32/rcc.h> 28 #include <libopencm3/stm32/gpio.h> 29 #include <libopencm3/stm32/i2c.h> 93 if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
94 return GPIO_BANK_I2C1_RE_SCL;
96 return GPIO_BANK_I2C1_SCL;
100 return GPIO_BANK_I2C2_SCL;
115 if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
116 return GPIO_BANK_I2C1_RE_SDA;
118 return GPIO_BANK_I2C1_SDA;
122 return GPIO_BANK_I2C2_SDA;
137 if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
138 return GPIO_I2C1_RE_SCL;
140 return GPIO_I2C1_SCL;
144 return GPIO_I2C2_SCL;
159 if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
160 return GPIO_I2C1_RE_SDA;
162 return GPIO_I2C1_SDA;
166 return GPIO_I2C2_SDA;
176 if (I2C1!=i2c && I2C2!=i2c) {
187 rcc_periph_clock_enable(RCC_AFIO);
188 rcc_periph_clock_enable(
RCC_I2C(i2c));
190 i2c_peripheral_disable(i2c);
191 I2C_CR1(i2c) |= I2C_CR1_SWRST;
192 I2C_CR1(i2c) &= ~I2C_CR1_SWRST;
195 }
else if (frequency>400) {
198 i2c_set_clock_frequency(i2c, rcc_apb1_frequency/1000000);
200 i2c_set_fast_mode(i2c);
201 i2c_set_ccr(i2c, rcc_apb1_frequency/(frequency*1000*2));
202 i2c_set_trise(i2c, (300/(1000/(rcc_apb1_frequency/1000000)))+1);
204 i2c_set_standard_mode(i2c);
205 i2c_set_ccr(i2c, rcc_apb1_frequency/(frequency*1000*2));
206 i2c_set_trise(i2c, (1000/(1000/(rcc_apb1_frequency/1000000)))+1);
208 i2c_peripheral_enable(i2c);
214 if (I2C1!=i2c && I2C2!=i2c) {
219 i2c_peripheral_disable(i2c);
220 rcc_periph_clock_disable(
RCC_I2C(i2c));
228 if (I2C1!=i2c && I2C2!=i2c) {
257 if (I2C1!=i2c && I2C2!=i2c) {
262 i2c_peripheral_disable(i2c);
279 I2C_CR1(i2c) |= I2C_CR1_SWRST;
280 I2C_CR1(i2c) &= ~I2C_CR1_SWRST;
281 i2c_peripheral_enable(i2c);
287 if (I2C1!=i2c && I2C2!=i2c) {
292 if (I2C_CR1(i2c) & (I2C_CR1_START|I2C_CR1_STOP)) {
296 while ((I2C_CR1(i2c) & I2C_CR1_START) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
297 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
300 while (!(I2C_SR1(i2c) & I2C_SR1_SB) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
301 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
304 if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) {
314 if (I2C1!=i2c && I2C2!=i2c) {
319 if (!(I2C_SR1(i2c) & I2C_SR1_SB)) {
325 if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) {
330 if (!address_10bit) {
331 I2C_SR1(i2c) &= ~(I2C_SR1_AF);
332 i2c_send_7bit_address(i2c, slave, write ? I2C_WRITE : I2C_READ);
333 while (!(I2C_SR1(i2c) & (I2C_SR1_ADDR|I2C_SR1_AF)) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
334 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
337 if (I2C_SR1(i2c) & I2C_SR1_AF) {
342 I2C_SR1(i2c) &= ~(I2C_SR1_AF);
343 I2C_DR(i2c) = 11110000 | (((slave>>8)&0x3)<<1);
344 while (!(I2C_SR1(i2c) & (I2C_SR1_ADD10|I2C_SR1_AF)) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
345 if (I2C_SR1(i2c) & I2C_SR1_AF) {
349 I2C_SR1(i2c) &= ~(I2C_SR1_AF);
350 I2C_DR(i2c) = (slave&0xff);
351 while (!(I2C_SR1(i2c) & (I2C_SR1_ADDR|I2C_SR1_AF)) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
352 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
355 if (I2C_SR1(i2c) & I2C_SR1_AF) {
365 I2C_SR1(i2c) &= ~(I2C_SR1_AF);
366 I2C_DR(i2c) = 11110001 | (((slave>>8)&0x3)<<1);
367 while (!(I2C_SR1(i2c) & (I2C_SR1_ADDR|I2C_SR1_AF)) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
368 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
371 if (I2C_SR1(i2c) & I2C_SR1_AF) {
377 if (!((I2C_SR2(i2c) & I2C_SR2_TRA))) {
381 if ((I2C_SR2(i2c) & I2C_SR2_TRA)) {
392 if (I2C1!=i2c && I2C2!=i2c) {
397 if (data==NULL || data_size==0) {
400 if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) {
403 if ((I2C_SR2(i2c) & I2C_SR2_TRA)) {
406 if (I2C_SR1(i2c) & I2C_SR1_AF) {
411 for (
size_t i=0; i<data_size; i++) {
412 if (i==data_size-1) {
413 i2c_disable_ack(i2c);
417 while (!(I2C_SR1(i2c) & I2C_SR1_RxNE) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
418 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
421 data[i] = i2c_get_data(i2c);
430 if (I2C1!=i2c && I2C2!=i2c) {
435 if (data==NULL || data_size==0) {
438 if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) {
441 if (!(I2C_SR2(i2c) & I2C_SR2_TRA)) {
444 if (I2C_SR1(i2c) & I2C_SR1_AF) {
449 for (
size_t i=0; i<data_size; i++) {
450 I2C_SR1(i2c) &= ~(I2C_SR1_AF);
451 i2c_send_data(i2c, data[i]);
452 while (!(I2C_SR1(i2c) & (I2C_SR1_TxE|I2C_SR1_AF)) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
453 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
456 if (I2C_SR1(i2c) & I2C_SR1_AF) {
467 if (I2C1!=i2c && I2C2!=i2c) {
472 if (!(I2C_SR2(i2c) & I2C_SR2_BUSY)) {
476 if (I2C_CR1(i2c) & (I2C_CR1_START|I2C_CR1_STOP)) {
481 while ((I2C_CR1(i2c) & I2C_CR1_STOP) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
482 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
485 while ((I2C_SR2(i2c) & I2C_SR2_MSL) && !(I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)));
486 if (I2C_SR1(i2c) & (I2C_SR1_BERR|I2C_SR1_ARLO)) {
496 if (I2C1!=i2c && I2C2!=i2c) {
509 if (NULL!=data && data_size>0) {
525 if (I2C1!=i2c && I2C2!=i2c) {
538 if (NULL!=data && data_size>0) {
554 if (I2C1!=i2c && I2C2!=i2c) {
569 if (NULL!=address && address_size>0) {
576 if (NULL!=data && data_size>0) {
600 if (I2C1!=i2c && I2C2!=i2c) {
615 if (NULL!=address && address_size>0) {
622 if (NULL!=data && data_size>0) {
library to communicate using I2C as master (API)
enum i2c_master_rc i2c_master_stop(uint32_t i2c)
sent stop condition
enum i2c_master_rc i2c_master_select_slave(uint32_t i2c, uint16_t slave, bool address_10bit, bool write)
select I2C slave device
enum i2c_master_rc i2c_master_read(uint32_t i2c, uint8_t *data, size_t data_size)
read data over I2C
void i2c_master_reset(uint32_t i2c)
reset I2C peripheral, fixing any locked state
an error on the I2C bus occurred
enum i2c_master_rc i2c_master_start(uint32_t i2c)
send start condition
global definitions and methods (API)
enum i2c_master_rc i2c_master_slave_read(uint32_t i2c, uint16_t slave, bool address_10bit, uint8_t *data, size_t data_size)
read data from slave device
static uint32_t RCC_GPIO_PORT_SDA(uint32_t i2c)
get RCC for GPIO port for SDA pin based on I2C identifier
enum i2c_master_rc i2c_master_write(uint32_t i2c, const uint8_t *data, size_t data_size)
write data over I2C
a start or stop condition is already in progress
void i2c_master_setup(uint32_t i2c, uint16_t frequency)
setup I2C peripheral
static uint32_t GPIO_PORT_SDA(uint32_t i2c)
get GPIO port for SDA pin based on I2C identifier
void i2c_master_release(uint32_t i2c)
release I2C peripheral
static uint32_t RCC_I2C(uint32_t i2c)
get RCC for I2C based on I2C identifier
static uint32_t GPIO_PIN_SCL(uint32_t i2c)
get GPIO pin for SCL pin based on I2C identifier
static uint32_t GPIO_PIN_SDA(uint32_t i2c)
get GPIO pin for SDA pin based on I2C identifier
enum i2c_master_rc i2c_master_slave_write(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t *data, size_t data_size)
write data to slave device
static uint32_t RCC_GPIO_PORT_SCL(uint32_t i2c)
get RCC for GPIO port for SCL pin based on I2C identifier
enum i2c_master_rc i2c_master_address_read(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t *address, size_t address_size, uint8_t *data, size_t data_size)
read data at specific address from an I2C memory slave
static uint32_t GPIO_PORT_SCL(uint32_t i2c)
get GPIO port for SCL pin based on I2C identifier
slave is not read (previous operations has been nacked)
bool i2c_master_check_signals(uint32_t i2c)
check if SDA and SCL signals are high
i2c_master_rc
I2C return codes.
enum i2c_master_rc i2c_master_address_write(uint32_t i2c, uint16_t slave, bool address_10bit, const uint8_t *address, size_t address_size, const uint8_t *data, size_t data_size)
write data at specific address on an I2C memory slave